In Reply to: RE: I tried, Lord knows, I tried... posted by fmak on April 15, 2009 at 23:49:01:
It's difficult to judge the performance of a complete component based on one of the hundreds of design aspects that it contains.
That said, I think that I2Se was not an optimal solution. The use of ECL made it quite expensive, and therefore not likely to be widely adopted. Then if you are going to the trouble of making a proprietary interface with a separate clock line, it is silly to put the clock in the transport. You may as well put it in the DAC, as then you can easily (and cheaply) achieve much lower jitter levels. But that is a problem that I have seen with every implementation of I2S, "enhanced" or plain.
And, as noted in the previous post, the lack of support for other sampling rates besides 44.1 kHz was the stake through its heart.
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Follow Ups
- RE: I tried, Lord knows, I tried... - Charles Hansen 04/16/0919:46:51 04/16/09 (2)
- RE: I tried, Lord knows, I tried... - fmak 21:58:00 04/16/09 (1)
- Oops... - Charles Hansen 18:50:06 04/17/09 (0)