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Digital Drive Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it. |
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Digital Drive Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it. |
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In Reply to: No. But, posted by jusbe on May 1, 2014 at 03:23:20:
Depends on how it is done - you need to pop the lid to know! Most designs that advertise reclocking are actually relying on an SRC which by definition uses a different clock reference for the final data being passed to the DAC. A few designs truly reclock the bitclock from the receiver. Even then, you can still discern a low jitter input in the listening.
The tolerance on the SPDIF interface is of the order of ns and the output jitter from the normal DIT chips can be quite high. I reclock the output of my transport so the data is cleaned up and resync'd to the master clock inside the transport before transmission. The receiver IC is very poor at rejecting low frequency jitter which is actually quite easily injected into the system via ground loops.
Big Ben and the like will do the equivalent of what I do and ensure that the input to the DAC is as clean as the master reference by galvanically isolating the output from the input. So you can clean up an optical input (say) and have a clean AES output. By positioning it near the DAC you can use ultra short digital cables.
Just an option to consider :)
Regards Anthony
"Beauty is Truth, Truth Beauty.." Keats
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Follow Ups
- RE: No. But, - flood2 05/1/1403:37:36 05/1/14 (2)
- And I2S? - jusbe 00:05:49 05/4/14 (1)
- RE: And I2S? - flood2 00:43:04 05/4/14 (0)
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