Computer Audio Asylum: Re: S/PDIF quality by John Swenson

There are three modes available in USB isochronous operation:

synchronous, adaptive and asynchronous.

Synchronous is by far the most common, in this case the source is in complete control, the ceciver has to have a PLL that locks to the data rate comming from the source. Getting good jitter performance from this mode is very difficult.

Adaptive has two way control, but not on a packet by packet basis. The source sends out a stream just like the synchronous mode, BUT the receiver can occasionally send a message to tell it to speed up or slow down. So theoretically you can have a super low jitter clock in the receiver that clocks the DAC and is used as the reference for the speed up, slow down messages.

Asynchronous mode sends a message from the receiver to the source requesting each packet, the source waits until it gets a request before sending any data. This is the model most people think of when they think of a "receiver in controll" mode of operation.

In actual use the asynchronous mode is almost never used, it has some problems, there is considerably more trafic on the bus because the receiver is requesting each packet, you need a fairly large buffer because the source might be busy when it gets a request.

The adaptive mode is probably the best to use for "hifi" purposes. The source schedules the packets to be sent at certain times so it doesn't have the large variation in latency that the asynchronous mode imposes.

Chips like the 2902 already use the adaptive mode. The 2902 has a 12 MHx clock that get upped to 96MHz internally, from this is generated the different frequencies used for the different sample rates it supports. The implementation uses that generated clock as the basis for the speed up/slow down messages sent to the source, The problem is that the internal DAC is clocked off the derrived clock which comes from a PLL so its not quite as good as running directly off the main clock. You CAN feed a really low jitter clock into the clock of the 2902, which should improve things, but the DAC is still clocked from the output of a PLL.

If you go to the 2707 instead you can get an I2S output to drive your own DAC chip of choice which should let you make a quite decent DAC, not quite as good as something where the low jitter clock directly drives the DAC, but close.

IF you are using 48 or 96 KHz sample rate you could use a 12MHz super low jitter clock and feed that to the 2707 AND directly to the DAC so the DAC is not clocked by the PLL output at all. But you are limited to sample rates you can use.

The 1020 and 3200 allow asynchronous mode where you feed the clock in and you can then feed that clock directly into the DAC, BUT you have to program the USB chip (its got a 8051 core that controls everything) AND you have to do your own rate selection. If you KNOW that it will only be used by say 44.1 you can just feed the right clock in and not worry about it, it will work at 44.1 but nothing else.

Given all the above, it sounds like the best compromise is to build a DAC with the 2707 as the USB interface, with a very low jitter 12MHz clock fed in, with the I2S driving your choice of DAC. Over the next month or so I probably will attempt to build such a beast and see how it works.

I hope that wasn't too much information all at once!

John S.