In Reply to: RE: Agree, and if I might be so bold as to add... posted by jkeny on January 15, 2016 at 16:11:55:
There have to be at least two clocks in any digital comm system: the transmitter clock and the receiver clock. In any given node, it is possible that all of the clocks are phase locked to each other, and of course the receiver clock(s) can be phase locked to the incoming waveforms. However, this is potentially a huge PLL mess. If you have asynchronous clock domains then there has to be special logic circuitry to attempt to deal with the "synchronizer problem".
Tony Lauck
"Diversity is the law of nature; no two entities in this universe are uniform." - P.R. Sarkar
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Follow Ups
- RE: Agree, and if I might be so bold as to add... - Tony Lauck 01/15/1616:48:57 01/15/16 (5)
- RE: Agree, and if I might be so bold as to add... - jkeny 16:57:44 01/15/16 (4)
- RE: Agree, and if I might be so bold as to add... - Tony Lauck 17:05:58 01/15/16 (3)
- RE: Agree, and if I might be so bold as to add... - jkeny 17:19:04 01/15/16 (2)
- RE: Agree, and if I might be so bold as to add... - Tony Lauck 17:46:19 01/15/16 (1)
- RE: Agree, and if I might be so bold as to add... - jkeny 18:19:40 01/15/16 (0)